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Report From: Delphi-BCB/Debugger/CPU    [ Add a report in this area ]  
Report #:  70186   Status: Open
SSSE3 instructions with MMX registers disassembled incorrectly
Project:  Delphi Build #:  3210
Version:    12.1 Submitted By:   Philipp S
Report Type:  Minor failure / Design problem Date Reported:  12/30/2008 5:18:16 AM
Severity:    Infrequently encountered problem Last Updated: 3/20/2012 2:24:39 AM
Platform:    All platforms Internal Tracking #:   267518
Resolution: None (Resolution Comments) Resolved in Build: : None
Duplicate of:  None
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Overall Rating: (1 Total Rating)
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Total Votes: 10
Description
The following SSSE3 instructions can operate either on MMX or XMM registers and, when used with MMX registers, are disassembled incorrectly in CPU view:

phaddw, phaddd, phaddsw, phsubw, phsubsw, phsubd, pabsb, pabsw, pabsd,pmaddubsw, pshufb and palignr.

Those SSSE3 instructions not included in this list are also disassembled incorrectly, but this is covered elsewhere, see http://forums.codegear.com/thread.jspa?threadID=9471&tstart=0

The aforementioned instructions appear to be compiled correctly to use MMX registers (i.e., instructions  are encoded as opcodes without the 66h prefix indicating use of XMM registers), but the disassembly in CPU view incorrectly shows them as using XMM registers.

When these instructions are used with XMM registers, the disassembly in CPU view is correct.

Reference: "Intel 64 and IA-32 Architectures Software Developer's Manual" (September 2008 version, http://www.intel.com/products/processor/manuals/), Volume 2B.
Steps to Reproduce:
Add the following code to a Delphi 2009 project, and view the compiled code in CPU view:
  asm
    phaddw mm0, mm1
    phaddd mm0, mm1
    phaddsw mm0, mm1
    phsubw mm0, mm1
    phsubsw mm0, mm1
    phsubd mm0, mm1
    pabsb mm0, mm1
    pabsw mm0, mm1
    pabsd mm0, mm1
    pmaddubsw mm0, mm1
    pshufb mm0, mm1
    palignr mm0, mm1  ; db 1 //Work-around to encode "PALIGNR MM0, MM1, 1"
    emms
  end;

CPU view shows the above as:
“0F3801C1         phaddw xmm0,xmm1
0F3802C1         phaddd xmm0,xmm1
0F3803C1         phaddsw xmm0,xmm1
0F3805C1         phsubw xmm0,xmm1
0F3807C1         phsubsw xmm0,xmm1
0F3806C1         phsubsd xmm0,xmm1
0F381CC1         pabsb xmm0,xmm1
0F381DC1         pabsw xmm0,xmm1
0F381EC1         pabsd xmm0,xmm1
0F3804C1         pmaddubsw xmm0,xmm1
0F3800C1         pshufb xmm0,xmm1
0F3A0FC101       palignr xmm0,xmm1,$01
0F77             emms”
Workarounds
None
Attachment
None
Comments

Markus Humm at 12/31/2008 3:06:00 AM -
marked as "needs attention"

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